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1 # HG changeset patch |
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2 # Parent f6996f95c7f8007fd7bf759092488ead6843441a |
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3 Bug 587188 - Failed to build firefox from trunk on PPC |
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4 |
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5 diff --git a/ipc/chromium/Makefile.in b/ipc/chromium/Makefile.in |
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6 --- a/ipc/chromium/Makefile.in |
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7 +++ b/ipc/chromium/Makefile.in |
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8 @@ -241,17 +241,16 @@ CPPSRCS += \ |
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9 |
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10 endif # } OS_MACOSX |
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11 |
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12 ifdef OS_LINUX # { |
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13 |
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14 CPPSRCS += \ |
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15 atomicops_internals_x86_gcc.cc \ |
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16 base_paths_linux.cc \ |
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17 - data_pack.cc \ |
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18 file_util_linux.cc \ |
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19 file_version_info_linux.cc \ |
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20 idle_timer_none.cc \ |
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21 process_util_linux.cc \ |
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22 time_posix.cc \ |
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23 $(NULL) |
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24 |
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25 ifdef MOZ_ENABLE_GTK2 |
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26 diff --git a/ipc/chromium/src/base/atomicops.h b/ipc/chromium/src/base/atomicops.h |
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27 --- a/ipc/chromium/src/base/atomicops.h |
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28 +++ b/ipc/chromium/src/base/atomicops.h |
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29 @@ -127,13 +127,15 @@ Atomic64 Release_Load(volatile const Ato |
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30 #if defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY) |
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31 #include "base/atomicops_internals_x86_msvc.h" |
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32 #elif defined(OS_MACOSX) && defined(ARCH_CPU_X86_FAMILY) |
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33 #include "base/atomicops_internals_x86_macosx.h" |
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34 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY) |
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35 #include "base/atomicops_internals_x86_gcc.h" |
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36 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM_FAMILY) |
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37 #include "base/atomicops_internals_arm_gcc.h" |
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38 +//#elif defined(COMPILER_GCC) && defined(ARCH_CPU_PPC_FAMILY) |
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39 +//#include "base/atomicops_internals_ppc_gcc.h" |
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40 #else |
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41 #include "base/atomicops_internals_mutex.h" |
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42 #endif |
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43 |
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44 #endif // BASE_ATOMICOPS_H_ |
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45 diff --git a/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h b/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h |
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46 new file mode 100644 |
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47 --- /dev/null |
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48 +++ b/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h |
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49 @@ -0,0 +1,148 @@ |
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50 +// Copyright (c) 2010 JJDaNiMoTh <jjdanimoth@gmail.com>. All rights reserved. |
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51 +// Use of this source code is governed by a BSD-style license that can be |
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52 +// found in the LICENSE file. |
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53 + |
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54 +// This file is an internal atomic implementation, use base/atomicops.h instead. |
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55 + |
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56 +#ifndef BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_ |
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57 +#define BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_ |
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58 +#define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory") |
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59 + |
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60 +#define PPC_ACQUIRE_BARRIER "\nisync\n" |
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61 +#define PPC_RELEASE_BARRIER "\nlwsync\n" |
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62 + |
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63 +namespace base { |
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64 +namespace subtle { |
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65 + |
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66 +// 32-bit low-level operations on any platform. |
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67 + |
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68 +/* |
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69 + * Compare and exchange - if *ptr == old, set it to new, |
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70 + * and return the old value of *p. |
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71 + */ |
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72 +inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
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73 + Atomic32 old_value, |
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74 + Atomic32 new_value) { |
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75 + Atomic32 prev; |
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76 + |
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77 + __asm__ __volatile__ ( |
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78 + "1: lwarx %0,0,%2\n" |
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79 + "cmpw 0,%0,%3\n" |
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80 + "bne- 2f\n" |
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81 + "stwcx. %4,0,%2\n" |
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82 + "bne- 1b\n" |
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83 + "2:\n" |
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84 + : "=&r" (prev), "+m" (*ptr) |
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85 + : "r" (ptr), "r" (old_value), "r" (new_value) |
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86 + : "cc", "memory"); |
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87 + |
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88 + return prev; |
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89 +} |
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90 + |
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91 +/* |
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92 +* Atomic exchange |
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93 +* |
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94 +* Changes the memory location '*ptr' to be new_value and returns |
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95 +* the previous value stored there. |
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96 +*/ |
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97 +inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, |
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98 + Atomic32 new_value) { |
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99 + Atomic32 prev; |
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100 + |
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101 + __asm__ __volatile__( |
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102 +"1: lwarx %0,0,%2 \n" |
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103 +" stwcx. %3,0,%2 \n\ |
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104 + bne- 1b" |
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105 + : "=&r" (prev), "+m" (*ptr) |
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106 + : "r" (ptr), "r" (new_value) |
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107 + : "cc", "memory"); |
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108 + |
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109 + return prev; |
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110 +} |
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111 + |
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112 +inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, |
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113 + Atomic32 increment) { |
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114 + Atomic32 temp; |
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115 + |
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116 + __asm__ __volatile__( |
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117 +"1: lwarx %0,0,%2\n\ |
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118 + add %0,%1,%0\n" |
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119 +" stwcx. %0,0,%2 \n\ |
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120 + bne- 1b" |
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121 + : "=&r" (temp) |
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122 + : "r" (increment), "r" (ptr) |
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123 + : "cc", "memory"); |
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124 + |
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125 + return temp; |
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126 +} |
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127 + |
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128 +inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, |
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129 + Atomic32 increment) { |
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130 + Atomic32 temp; |
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131 + |
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132 + __asm__ __volatile__( |
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133 + PPC_RELEASE_BARRIER |
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134 +"1: lwarx %0,0,%2\n\ |
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135 + add %0,%1,%0\n" |
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136 +" stwcx. %0,0,%2 \n\ |
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137 + bne- 1b" |
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138 + PPC_ACQUIRE_BARRIER |
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139 + : "=&r" (temp) |
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140 + : "r" (increment), "r" (ptr) |
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141 + : "cc", "memory"); |
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142 + |
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143 + return temp; |
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144 +} |
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145 + |
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146 +inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, |
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147 + Atomic32 old_value, |
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148 + Atomic32 new_value) { |
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149 + return NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
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150 +} |
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151 + |
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152 +inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, |
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153 + Atomic32 old_value, |
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154 + Atomic32 new_value) { |
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155 + return NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
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156 +} |
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157 + |
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158 +inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) { |
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159 + *ptr = value; |
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160 +} |
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161 + |
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162 +inline void MemoryBarrier() { |
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163 + __asm__ __volatile__("sync" : : : "memory"); |
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164 +} |
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165 + |
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166 +inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) { |
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167 + *ptr = value; |
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168 + MemoryBarrier(); |
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169 +} |
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170 + |
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171 +inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) { |
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172 + MemoryBarrier(); |
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173 + *ptr = value; |
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174 +} |
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175 + |
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176 +inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) { |
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177 + return *ptr; |
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178 +} |
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179 + |
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180 +inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) { |
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181 + Atomic32 value = *ptr; |
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182 + MemoryBarrier(); |
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183 + return value; |
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184 + |
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185 +} |
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186 + |
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187 +inline Atomic32 Release_Load(volatile const Atomic32* ptr) { |
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188 + MemoryBarrier(); |
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189 + return *ptr; |
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190 +} |
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191 + |
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192 +} // namespace base::subtle |
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193 +} // namespace base |
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194 + |
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195 +#undef ATOMICOPS_COMPILER_BARRIER |
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196 + |
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197 +#endif // BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_ |
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198 diff --git a/ipc/chromium/src/build/build_config.h b/ipc/chromium/src/build/build_config.h |
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199 --- a/ipc/chromium/src/build/build_config.h |
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200 +++ b/ipc/chromium/src/build/build_config.h |
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201 @@ -52,19 +52,20 @@ |
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202 #define ARCH_CPU_X86_FAMILY 1 |
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203 #define ARCH_CPU_X86 1 |
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204 #define ARCH_CPU_32_BITS 1 |
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205 #elif defined(__ARMEL__) |
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206 #define ARCH_CPU_ARM_FAMILY 1 |
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207 #define ARCH_CPU_ARMEL 1 |
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208 #define ARCH_CPU_32_BITS 1 |
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209 #define WCHAR_T_IS_UNSIGNED 1 |
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210 -#elif defined(__ppc__) |
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211 +#elif defined(__ppc__) || defined(__powerpc) || defined(__PPC__) |
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212 #define ARCH_CPU_PPC 1 |
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213 #define ARCH_CPU_32_BITS 1 |
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214 +#define ARCH_CPU_PPC_FAMILY 1 |
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215 #else |
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216 #error Please add support for your architecture in build/build_config.h |
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217 #endif |
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218 |
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219 // Type detection for wchar_t. |
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220 #ifndef CHROMIUM_MOZILLA_BUILD |
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221 |
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222 #if defined(OS_WIN) |