1 Subject: Patches needed to build on SLE11/11.1

     2 References:

     3 https://bugzilla.mozilla.org/show_bug.cgi?id=513422

     4 

     5 diff --git a/gfx/cairo/cairo/src/cairo-xlib-surface.c b/gfx/cairo/cairo/src/cairo-xlib-surface.c

     6 --- a/gfx/cairo/cairo/src/cairo-xlib-surface.c

     7 +++ b/gfx/cairo/cairo/src/cairo-xlib-surface.c

     8 @@ -4041,17 +4041,19 @@ _cairo_xlib_surface_add_glyph (Display *

     9  	    new = malloc (4 * c);

    10  	    if (unlikely (new == NULL)) {

    11  		status = _cairo_error (CAIRO_STATUS_NO_MEMORY);

    12  		goto BAIL;

    13  	    }

    14  	    n = new;

    15  	    d = (uint32_t *) data;

    16  	    do {

    17 -		*n++ = bswap_32 (*d++);

    18 +		*n = bswap_32 (*d);

    19 +                *n++;

    20 +                *d++;

    21  	    } while (--c);

    22  	    data = (uint8_t *) new;

    23  	}

    24  	break;

    25      case CAIRO_FORMAT_RGB24:

    26      default:

    27  	ASSERT_NOT_REACHED;

    28  	break;

    29 diff --git a/xpcom/glue/SSE.cpp b/xpcom/glue/SSE.cpp

    30 --- a/xpcom/glue/SSE.cpp

    31 +++ b/xpcom/glue/SSE.cpp

    32 @@ -44,26 +44,77 @@ namespace {

    33  // SSE.h has parallel #ifs which declare MOZILLA_SSE_HAVE_CPUID_DETECTION.

    34  // We can't declare these functions in the header file, however, because

    35  // <intrin.h> conflicts with <windows.h> on MSVC 2005, and some files want to

    36  // include both SSE.h and <windows.h>.

    37  

    38  #if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3)) && (defined(__i386__) || defined(__x86_64__))

    39  

    40  // cpuid.h is available on gcc 4.3 and higher on i386 and x86_64

    41 -#include <cpuid.h>

    42 +//#include <cpuid.h>

    43  

    44  enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };

    45  

    46 +#ifdef __i386__

    47 +#define _my_cpuid(level, a, b, c, d)                    \

    48 +  __asm__ ("xchg{l}\t{%%}ebx, %1\n\t"                   \

    49 +           "cpuid\n\t"                                  \

    50 +           "xchg{l}\t{%%}ebx, %1\n\t"                   \

    51 +           : "=a" (a), "=r" (b), "=c" (c), "=d" (d)     \

    52 +           : "0" (level))

    53 +#else

    54 +#define _my_cpuid(level, a, b, c, d)                    \

    55 +  __asm__ ("cpuid\n\t"                                  \

    56 +           : "=a" (a), "=b" (b), "=c" (c), "=d" (d)     \

    57 +           : "0" (level))

    58 +#endif

    59 +

    60 +static __inline unsigned int

    61 +my_cpuid_max (unsigned int __ext, unsigned int *__sig)

    62 +{

    63 +  unsigned int __eax, __ebx, __ecx, __edx;

    64 +

    65 +#ifdef __i386__

    66 +  __asm__ ("pushf{l|d}\n\t"

    67 +           "pushf{l|d}\n\t"

    68 +           "pop{l}\t%0\n\t"

    69 +           "mov{l}\t{%0, %1|%1, %0}\n\t"

    70 +           "xor{l}\t{%2, %0|%0, %2}\n\t"

    71 +           "push{l}\t%0\n\t"

    72 +           "popf{l|d}\n\t"

    73 +           "pushf{l|d}\n\t"

    74 +           "pop{l}\t%0\n\t"

    75 +           "popf{l|d}\n\t"

    76 +           : "=&r" (__eax), "=&r" (__ebx)

    77 +           : "i" (0x00200000));

    78 +

    79 +  if (!((__eax ^ __ebx) & 0x00200000))

    80 +    return 0;

    81 +#endif

    82 +

    83 +  /* Host supports cpuid.  Return highest supported cpuid input value.  */

    84 +  _my_cpuid (__ext, __eax, __ebx, __ecx, __edx);

    85 +

    86 +  if (__sig)

    87 +    *__sig = __ebx;

    88 +

    89 +  return __eax;

    90 +}

    91 +

    92  static bool

    93  has_cpuid_bit(unsigned int level, CPUIDRegister reg, unsigned int bit)

    94  {

    95    unsigned int regs[4];

    96 -  return __get_cpuid(level, &regs[0], &regs[1], &regs[2], &regs[3]) &&

    97 -         (regs[reg] & bit);

    98 +

    99 +  unsigned int __ext = level & 0x80000000;

   100 +  if (my_cpuid_max(__ext, 0) < level)

   101 +    return false;

   102 +

   103 +  _my_cpuid(level, regs[0], regs[1], regs[2], regs[3]);

   104 +  return !!(unsigned(regs[reg]) & bit);

   105  }

   106  

   107  #elif defined(_MSC_VER) && _MSC_VER >= 1400 && (defined(_M_IX86) || defined(_M_AMD64))

   108  

   109  // MSVC 2005 or newer on x86-32 or x86-64

   110  #include <intrin.h>

   111  

   112  enum CPUIDRegister { eax = 0, ebx = 1, ecx = 2, edx = 3 };