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# HG changeset patch
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# Parent f6996f95c7f8007fd7bf759092488ead6843441a
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Bug 587188 - Failed to build firefox from trunk on PPC (fixed m-c)
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270
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diff --git a/ipc/chromium/Makefile.in b/ipc/chromium/Makefile.in
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--- a/ipc/chromium/Makefile.in
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+++ b/ipc/chromium/Makefile.in
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@@ -241,17 +241,16 @@ CPPSRCS += \
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endif # } OS_MACOSX
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ifdef OS_LINUX # {
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CPPSRCS += \
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atomicops_internals_x86_gcc.cc \
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base_paths_linux.cc \
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- data_pack.cc \
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file_util_linux.cc \
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file_version_info_linux.cc \
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idle_timer_none.cc \
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process_util_linux.cc \
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time_posix.cc \
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$(NULL)
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ifdef MOZ_ENABLE_GTK2
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diff --git a/ipc/chromium/src/base/atomicops.h b/ipc/chromium/src/base/atomicops.h
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--- a/ipc/chromium/src/base/atomicops.h
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+++ b/ipc/chromium/src/base/atomicops.h
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@@ -127,13 +127,15 @@ Atomic64 Release_Load(volatile const Ato
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#if defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY)
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#include "base/atomicops_internals_x86_msvc.h"
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#elif defined(OS_MACOSX) && defined(ARCH_CPU_X86_FAMILY)
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#include "base/atomicops_internals_x86_macosx.h"
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#elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY)
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#include "base/atomicops_internals_x86_gcc.h"
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#elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM_FAMILY)
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#include "base/atomicops_internals_arm_gcc.h"
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+//#elif defined(COMPILER_GCC) && defined(ARCH_CPU_PPC_FAMILY)
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+//#include "base/atomicops_internals_ppc_gcc.h"
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#else
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#include "base/atomicops_internals_mutex.h"
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#endif
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#endif // BASE_ATOMICOPS_H_
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diff --git a/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h b/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h
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new file mode 100644
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--- /dev/null
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+++ b/ipc/chromium/src/base/atomicops_internals_ppc_gcc.h
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@@ -0,0 +1,148 @@
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+// Copyright (c) 2010 JJDaNiMoTh <jjdanimoth@gmail.com>. All rights reserved.
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+// Use of this source code is governed by a BSD-style license that can be
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+// found in the LICENSE file.
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+
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+// This file is an internal atomic implementation, use base/atomicops.h instead.
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+
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+#ifndef BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_
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+#define BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_
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+#define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory")
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+
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+#define PPC_ACQUIRE_BARRIER "\nisync\n"
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+#define PPC_RELEASE_BARRIER "\nlwsync\n"
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+
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+namespace base {
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+namespace subtle {
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+
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+// 32-bit low-level operations on any platform.
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+
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+/*
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+ * Compare and exchange - if *ptr == old, set it to new,
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+ * and return the old value of *p.
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+ */
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+inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
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+ Atomic32 old_value,
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+ Atomic32 new_value) {
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+ Atomic32 prev;
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+
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+ __asm__ __volatile__ (
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+ "1: lwarx %0,0,%2\n"
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+ "cmpw 0,%0,%3\n"
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+ "bne- 2f\n"
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+ "stwcx. %4,0,%2\n"
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+ "bne- 1b\n"
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+ "2:\n"
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+ : "=&r" (prev), "+m" (*ptr)
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+ : "r" (ptr), "r" (old_value), "r" (new_value)
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+ : "cc", "memory");
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+
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+ return prev;
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+}
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+
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+/*
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+* Atomic exchange
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+*
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+* Changes the memory location '*ptr' to be new_value and returns
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+* the previous value stored there.
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+*/
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+inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
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+ Atomic32 new_value) {
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+ Atomic32 prev;
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+
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+ __asm__ __volatile__(
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+"1: lwarx %0,0,%2 \n"
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+" stwcx. %3,0,%2 \n\
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+ bne- 1b"
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+ : "=&r" (prev), "+m" (*ptr)
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+ : "r" (ptr), "r" (new_value)
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+ : "cc", "memory");
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+
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+ return prev;
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+}
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+
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+inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
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+ Atomic32 increment) {
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+ Atomic32 temp;
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+
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+ __asm__ __volatile__(
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+"1: lwarx %0,0,%2\n\
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+ add %0,%1,%0\n"
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+" stwcx. %0,0,%2 \n\
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+ bne- 1b"
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+ : "=&r" (temp)
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+ : "r" (increment), "r" (ptr)
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+ : "cc", "memory");
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+
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+ return temp;
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+}
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+
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+inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
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+ Atomic32 increment) {
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+ Atomic32 temp;
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+
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+ __asm__ __volatile__(
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+ PPC_RELEASE_BARRIER
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+"1: lwarx %0,0,%2\n\
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+ add %0,%1,%0\n"
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+" stwcx. %0,0,%2 \n\
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+ bne- 1b"
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+ PPC_ACQUIRE_BARRIER
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+ : "=&r" (temp)
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+ : "r" (increment), "r" (ptr)
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+ : "cc", "memory");
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+
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+ return temp;
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+}
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+
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+inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
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+ Atomic32 old_value,
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+ Atomic32 new_value) {
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+ return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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+}
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+
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+inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
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+ Atomic32 old_value,
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+ Atomic32 new_value) {
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+ return NoBarrier_CompareAndSwap(ptr, old_value, new_value);
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+}
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+
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+inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
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+ *ptr = value;
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+}
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+
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+inline void MemoryBarrier() {
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+ __asm__ __volatile__("sync" : : : "memory");
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+}
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+
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+inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
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+ *ptr = value;
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+ MemoryBarrier();
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+}
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+
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+inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
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+ MemoryBarrier();
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+ *ptr = value;
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+}
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+
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+inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
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+ return *ptr;
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+}
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+
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+inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
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+ Atomic32 value = *ptr;
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+ MemoryBarrier();
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+ return value;
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+
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+}
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+
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+inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
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+ MemoryBarrier();
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+ return *ptr;
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+}
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+
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+} // namespace base::subtle
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+} // namespace base
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+
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+#undef ATOMICOPS_COMPILER_BARRIER
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+
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+#endif // BASE_ATOMICOPS_INTERNALS_PPC_GCC_H_
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diff --git a/ipc/chromium/src/build/build_config.h b/ipc/chromium/src/build/build_config.h
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--- a/ipc/chromium/src/build/build_config.h
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+++ b/ipc/chromium/src/build/build_config.h
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@@ -52,19 +52,20 @@
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#define ARCH_CPU_X86_FAMILY 1
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#define ARCH_CPU_X86 1
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#define ARCH_CPU_32_BITS 1
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#elif defined(__ARMEL__)
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#define ARCH_CPU_ARM_FAMILY 1
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#define ARCH_CPU_ARMEL 1
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#define ARCH_CPU_32_BITS 1
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#define WCHAR_T_IS_UNSIGNED 1
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-#elif defined(__ppc__)
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+#elif defined(__ppc__) || defined(__powerpc) || defined(__PPC__)
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#define ARCH_CPU_PPC 1
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#define ARCH_CPU_32_BITS 1
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+#define ARCH_CPU_PPC_FAMILY 1
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#else
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#error Please add support for your architecture in build/build_config.h
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#endif
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// Type detection for wchar_t.
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#ifndef CHROMIUM_MOZILLA_BUILD
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#if defined(OS_WIN)
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